The present invention relates to a delay line which includes a principal signal path and a return path. The invention more particularly relates to such a delay line in which signal and return path lines are disposed on a common core.
The art of delay lines is well developed and includes a large variety of devices and circuit configurations. Generally speaking, they delay signals for specified periods of time. Many applications and electronic signals require the use and employment of such delay lines. THe periods of delay may be as short as a fraction of a microsecond and as long as twenty microseconds, or even longer. For a variety of reasons, it is advisable to use a basic construction and configuration and to cut therefrom requesite lengths commensurate with the desired delays, which procedure is necessarily followed by calibration, fine tuning and trimming. In some cases, it is desirable to provide such a delay line in a physically short configuration requiring an accordingly high inductance.
A particular, known constructions for such a delay line includes a bifilar or double winding; signal transmission and return path portions are juxtaposed in each group of the winding. Such a device is easy to make but has certain drawbacks as regards electrical performance. First of all, the inductance is rather small, so that the delays which can be obtained from a given length of such a line are quite small. Also, the characteristic impedence is too small for many applications.
The East German Pat. No. 62093 describes a method for making delay lines in which signal line and return path are wound onto a common core, but in opposite helical pitch. Thus, the position of one line relative to the core changes a little on each cross point. A delay line made in that manner has a high inductance and is of symmetrical construction. Such coil assembly, however, cannot be made with conventional machines, but requires a specially constructed one. Accordingly, such delay lines are expensive.